1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com td9944 features dual n-channel devices low threshold C 2.0v max. high input impedance low input capacitance C 125pf max. fast switching speeds low on-resistance free from secondary breakdown low input and output leakage applications logic level interfaces C ideal for ttl and cmos solid state relays battery operated systems photo voltaic drives analog switches general purpose line drivers telecom switches ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? general description this low threshold, enhancement-mode (normally-off) transistor utilizes a vertical dmos structure and supertexs well-proven, silicon-gate manufacturing process. this combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coef?cient inherent in mos devices. characteristic of all mos structures, this device is free from thermal runaway and thermally-induced secondary breakdown. supertexs vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. dual n-channel enhancement-mode vertical dmos fet absolute maximum ratings parameter value drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 20v operating and storage temperature -55 o c to +150 o c soldering temperature* 300 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. * distance of 1.6mm from case for 10 seconds. ordering information device package option bv dss /bv dgs (v) r ds(on) (max) () i d(on) (min) (a) v gs(th) (max) (v) 8-lead soic 4.90x3.90mm body 1.75mm height (max) 1.27mm pitch td9944 TD9944TG-G 240 6.0 1.0 2.0 -g indicates package is rohs compliant (green) g2 s2 g1 s1 d2 d2 d1 d1 yy = year sealed ww = week sealed = green packaging t d 9 9 4 4 t g y y w w 8-lead soic (tg) product marking 8-lead soic (tg) package may or may not include the following marks: si or pin con?guration
2 td9944 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com electrical characteristics (t a = 25 o c unless otherwise speci?ed) sym parameter min typ max units conditions bv dss drain-to-source breakdown voltage 240 - - v v gs = 0v, i d = 2.0ma v gs(th) gate threshold voltage 0.6 - 2.0 v v gs = v ds , i d = 1.0ma v gs(th) change in v gs(th) with temperature - - -5.0 mv/ o c v gs = v ds , i d = 1.0ma i gss gate body leakage - - 100 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current - - 10 a v gs = 0v, v ds = max rating - - 1.0 ma v ds = 0.8max rating, v gs = 0v, t a = 125c i d(on) on-state drain current 0.5 1.9 - a v gs = 4.5v, v ds = 25v 1.0 2.8 - v gs = 10v, v ds = 25v r ds(on) static drain-to-source on-state resistance - 4.0 6.0 v gs = 4.5v, i d = 250ma - 4.0 6.0 v gs = 10v, i d = 0.5a r ds(on) change in r ds(on) with temperature - - 1.4 %/ o c v gs = 10v, i d = 0.5a g fs forward transductance 300 600 - mmho v ds = 20v, i d = 0.5a c iss input capacitance - 65 125 pf v gs = 0v, v ds = 25v, f = 1.0mhz c oss common source output capacitance - 35 70 c rss reverse transfer capacitance - 10 25 t d(on) turn-on delay time - - 10 ns v dd = 25v, i d = 1.0a, r gen = 25 t r rise time - - 10 t d(off) turn-off delay time - - 20 t f fall time - - 20 v sd diode forward voltage drop - - 1.8 v v gs = 0v, i sd = 1.0a t rr reverse recovery time - 300 - ns v gs = 0v, i sd = 1.0a notes: all d.c. parameters 100% tested at 25 o c unless otherwise stated. (pulse test: 300s pulse, 2% duty cycle.) all a.c. parameters sample tested. 1. 2. switching waveforms and test circuit 90% 10% 90% 90% 10% 10% puls e genera to r v dd r l outpu t d.u.t . t (on) t d(on) t (off ) t d(off) t f t r inpu t input output 10v v dd r gen 0v 0v
3 td9944 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com typical performance curves t j ) h t ( s g v ) d e z i l a m r o n ( ) n o ( s d r ) d e z i l a m r o n ( v ds (th) and r variation with temperature c) ( on-resistance vs. drain current (amperes) d ) s m h o ( ) n o ( s d r variation with temperature dss s s d ) d e z i l a m r o n ( v b c) ( t j transfer characteristic s v gs (volts) i ) s e r e p m a ( d i bv 0 2 4 6 8 1 0 3.0 2.5 2.0 1.5 1.0 0.5 0 -50 0 5 0 100 150 1.1 1.0 10 8 6 4 2 0 1.4 1.2 1.0 0.8 0.6 -50 0 5 0 100 150 v gs = 4.5v v gs = 10 v t = -55 c a v ds = 25v 150 c 0 1 2 3 5 4 0.9 2. 4 2. 0 1. 6 1. 2 0. 8 0. 4 (th) v @ 1m a r ds(on ) @ 10 v, 0.5a 25 c output characteristics 4.0 3.2 2.4 1.6 0.8 0 v ds (volts) i ) s e r e p m a ( d saturation characteristics 2.5 2.0 1.5 1.0 0.5 0 v ds (volts) i ) s e r e p m a ( d 0 1 0 2 0 3 0 5 0 40 v gs = 10v 8v 6v 4v 2v 0 2 4 6 10 8 v gs = 10 v 2v 6v 4v 3v 3v 8v
4 td9944 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com typical performance curves (cont.) transconductance vs. drain current 1.0 0.8 0.6 0.4 0.2 0 0 4.0 0.8 1.6 2.4 3.2 g s f ) s n e m e i s ( i d (amperes) t a = -55 c v ds = 25v t a = 25 c t a = 15 0 c gate drive dynamic characteristics q (nanocoulombs) g v s g ) s t l o v ( capacitance vs. drain-to-source voltage 200 ) s d a r a f o c i p ( c v ds (volts) 0 1 0 2 0 3 0 4 0 150 100 0 10 8 6 4 2 0 0.4 0. 8 1. 2 1.6 2. 0 63pf v ds = 40 v v ds = 10 v f = 1mh z c iss c oss c rss 150 pf 50 0
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate product liability indemnification insurance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. website: http//www .supertex.com . ?2009 all rights reserved. unauthorized use or reproduction is prohibited . 1235 bordeaux drive, sunnyvale, ca 94089 te l: 408-222-8888 www .supertex.com 5 td9944 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the latest package outline information go to http://www.supertex.com/packaging.htm l .) doc.# dsfp-td9944 a041309 8-lead soic (narrow body) package outline (tg) 4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch 1 8 seating plane gauge plane l l1 l2 e e1 d e b a a2 a1 seating plane a a to p v iew side v iew vi ew b vi ew b 1 note 1 (index area d/2 x e1/2) vi ew a-a h h note 1 symbol a a1 a2 b d e e1 e h l l1 l2 1 dimension (mm) min 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80* 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 4.90 6.00 3.90 - - - - max 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00* 0.50 1.27 8 o 15 o jedec registration ms-012, variation aa, issue e, sept. 2005. * this dimension is not speci?ed in the jedec drawing. drawings are not to scale. supertex doc. #: dspd-8solgtg, version i041309. note: this chamfer feature is optional. a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1.
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